1. Field of the Invention
The present invention relates to an integrated circuit, and more particularly, to an integrated circuit having a redundancy repair function.
2. Description of Related Art
When a defective memory cell exists in a semiconductor integrated circuit having a built-in RAM or the like, the defective memory cell is replaced with a spare memory cell so that the defective memory cell is equivalently repaired, thereby improving the production yield. In this manner, current semiconductor integrated circuits adopt redundancy (redundant configuration) in which a redundant or spare memory cell is provided so that a defective memory cell is repaired by being replaced with the spare memory cell.
In recent years, the capacity of memory circuits, such as a built-in RAM, has been increasing. Thus, if such redundancy is not utilized in memory circuits, the production yield may deteriorate. Moreover, the location of a defect failure varies depending on ambient conditions. Specifically, a defect may occur at a certain address under the condition of high temperature and high voltage, while a defect may occur at another address under the condition of low temperature and low voltage. Therefore, there is a demand for a method and circuit capable of performing redundancy repair on the defects, which occur under various conditions as described above, at low cost.
As a related art, Japanese Unexamined Patent Application Publication No. 2007-323726 discloses a method for shortening the time required to transfer repair information for repairing a defect in a redundant memory and the time required to cut a fuse.